HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 92

• Manufacturer Part Number: HD64F3437STF16V
• Description: MCU 3/5V 60K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3437STF16V

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized by a reset, but is not initialized in the software standby mode.
Bit 0: RAME
0
1
3.3
Notes: *1 H8/3437SF (S-mask model, single-power-supply on-chip flash memory version) only.
The mode control register (MDCR) is an 8-bit register that indicates the operating mode of the
chip.
Bit 7—Expanded Mode Enable (EXPE): Functions only in the H8/3437SF (S-mask model,
single-power-supply on-chip flash memory version). For details, see section 21.1.6, Mode Control
Register (MDCR).
In models other than the H8/3437SF, this is a reserved bit that cannot be modified and is always
read as 1.
Bits 6 and 5—Reserved: These bits cannot be modified and are always read as 1.
Bits 4 and 3—Reserved: These bits cannot be modified and are always read as 0.
Bit 2—Reserved: This bit cannot be modified and is always read as 1.
Bits 1 and 0—Mode Select 1 and 0 (MDS1 and MDS0): These bits indicate the values of the
mode pins (MD
corresponds to MD
control register is read, the levels at the mode pins (MD
60
Bit
Initial value
Read/Write
*2 Determined by the mode pins (MD
Mode Control Register (MDCR)
Otherwise, this is a reserved bit that is always read as 1.
1
and MD
EXPE
R/W
1
—
Description
The on-chip RAM is disabled.
The on-chip RAM is enabled.
and MDS0 to MD
7
* 2
*2
*1
0
), thereby indicating the current operating mode of the chip. MDS1
—
—
6
1
0
. These bits can be read but not written. When the mode
—
—
5
1
1
and MD
—
—
4
0
0
).
1
and MD
—
—
3
0
0
) are latched in these bits.
—
—
2
1
MDS1
—
1
R
* 2
(Initial value)
MDS0
—
0
R
* 2