HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 423

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
7. If the input level of the MD
8. When applying 12 V to the MD
Notes: *1 For details on applying, releasing, and shutting off V
addition, make sure that V
the flash memory is being programmed or erased.
Boot mode can be released by driving the reset pin low, waiting at least ten system clock
cycles, then releasing the application of 12 V to the MD
The settings of external pins must not change during operation in boot mode.
During boot mode, if input of 12 V to the MD
pin, the boot mode state is maintained within the chip and boot mode continues (but do not
stop applying 12 V to the FV
If a watchdog timer reset occurs during boot mode, this does not release the internal mode
state, but the internal boot program is restarted.
Therefore, to change from boot mode to another mode, the boot-mode state within the chip
must be released by a reset input at the RES pin before the mode transition can take place.
while the input to the RES pin is low), the resultant switch in the microcontroller’s operating
mode will affect the bus control output signals (AS, RD, and WR) and the status of ports that
can be used for address output
Therefore, either set these pins so that they do not output signals during the reset, or make sure
that their output signals do not collide with other signals outside the microcontroller.
the rated limit of 13 V.
Also, be sure to connect a decoupling capacitor to the FV
*2 These ports output low-level address signals if the mode pins are set to mode 1 during
Flash Memory Programming and Erasing Precautions.
the reset. In all other modes, these ports are in the high-impedance state. The bus
control output signals are high if the mode pins are set for mode 1 or 2 during the reset.
In mode 3, they are at high impedance.
PP
1
is not released or shut off while the boot program is executing or
pin is changed during a reset (e.g., from 0 V to 5 V then to 12 V
PP
*2
pin during boot mode
.
1
and FV
PP
pins, make sure that peak overshoot does not exceed
1
pin stops but no reset input occurs at the RES
*1
*1
).
1
and FV
PP
and MD
PP
, see note (5) in section 19.7,
PP
pins and releasing the reset.
1
pins.
391

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