HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 436

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Flowchart for Erasing Multiple Blocks
404
Erase-verify
next block
Address + 1
address
No
Select erase mode (E bit = 1 in FLMCR)
Figure 19.11 Multiple-Block Erase Flowchart
(set bits of blocks to be erased to 1)
Write 0 data to all addresses to be
No
Dummy write to verify address
(flash memory latches address)
Clear EBR bit of erased block
Set top address of block as
Select erase-verify mode
Set erase block registers
Enable watchdog timer
Disable watchdog timer
(EV bit = 1 in FLMCR)
(EBR1 = EBR2 = 0?)
erased (prewrite)
All blocks erased?
Yes
(read data H'FF?)
All erased blocks
Yes
Wait (t
Wait (t
verify address
Wait (X) ms
OK
Last address
Clear EV bit
End of erase
Yes
Clear E bit
verified?
in block?
Verify
Start
n = 1
VS
VS
1) s
2) s
*4
*5
*5
*5
*1
*2
*3
No go
No
Erasing
ends
All erased blocks
Yes
Erase error
verified?
n
Yes
Notes: *1 Program all addresses to be
N?
*5
*2 Set the watchdog timer
*3 For the erase-verify dummy
*4 Read the data to be verified
*5 X:
Erase-verify next block
erased by following the prewrite
flowchart.
overflow interval to the value
indicated in table 19.10.
write, write H'FF with a byte
transfer instruction.
with a byte transfer instruction.
When erasing two or more
blocks, clear the bits of erased
blocks in the erase block
register, so that only unerased
blocks will be erased again.
t
t
N:
VS
VS
No
1: 4 s or more
2: 2 s or more
No
10 ms
3000
n + 1
n

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