HD64F3437STF16V Renesas Electronics America, HD64F3437STF16V Datasheet - Page 558

MCU 3/5V 60K PB-FREE 100-TQFP

HD64F3437STF16V

Manufacturer Part Number
HD64F3437STF16V
Description
MCU 3/5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet

Specifications of HD64F3437STF16V

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3437STF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3437STF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Error Protection: In error protection, an error is detected when microcontroller runaway occurs
during flash memory programming/erasing, or operation is not performed in accordance with the
program/erase algorithm, and the program/erase operation is aborted. Aborting the program/erase
operation prevents damage to the flash memory due to overprogramming or overerasing.
If the microcontroller malfunctions during flash memory programming/erasing, the FLER bit is set
to 1 in FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, and EBR2
settings are retained, but program mode or erase mode is aborted at the point at which the error
occurred. Program mode or erase mode cannot be re-entered by re-setting the P or E bit. However,
PV and EV bit setting is enabled, and a transition can be made to verify mode.
FLER bit setting conditions are as follows:
1. When flash memory is read during programming/erasing (including a vector read or instruction
2. Immediately after the start of exception handling (excluding a reset) during
3. When a SLEEP instruction (including software standby) is executed during
4. When the bus is released during programming/erasing
Error protection is released only by a power-on reset.
Figure 21.14 shows the flash memory state transition diagram.
526
fetch)
programming/erasing
programming/erasing

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