UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 1028

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UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
1026
Notes 1. To cancel the wait state, write FFH to IICn or set WRELn.
Remark
2. Cancel the wait during a slave transmission by writing to IICn, not by setting WRELn.
3. When the wait during a slave transmission is canceled by setting WRELn, TRCn is cleared.
WRELn
INTIICn
WRELn
INTIICn
ACKDn
MSTSn
ACKDn
MSTSn
WTIMn
ACKEn
WTIMn
ACKEn
Processing by master device
SDA0n
Transfer lines
SCL0n
n = 0 to 3 (V850ES/JH3-E)
n = 0 to 4 (V850ES/JJ3-E)
Processing by slave device
STDn
SPDn
TRCn
STDn
SPDn
TRCn
STTn
SPTn
STTn
SPTn
IICn
IICn
(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (3/3)
Transmit
H
H
L
L
L
Receive
Figure 20-25. Example of Slave to Master Communication
IICn ← data Note 2
D7
1
D6
2
D5
3
User’s Manual U19601EJ2V0UD
D4
4
CHAPTER 20 I
(c) Stop condition
D3
5
D2
6
D1
7
2
C BUS
D0
8
IICn ← FFH Note 1
NACK
Note 1
9
IICn ← FFH Note 1
Note 1, 3
Note 3
condition
Stop
(when SPIEn = 1)
(When
Receive
condition
IICn ← address
SPIEn = 1)
Start
AD6
1

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