UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 858

• Manufacturer Part Number: UPD70F3785GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3785GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

856
(n = 0, 1)
CEnSTR
After reset: 20H
CHAPTER 18 CLOCKED SERIAL INTERFACE E WITH FIFO (CSIE)
CEnPCT
CEnPCT
• This bit is always 0 when it is read.
• If 1 is written to the CEnPCT bit in the middle of transfer, transfer is aborted.
• This bit is cleared to 0 when the CEnCTL0.CEnPWR register is cleared to 0 or
• If transfer of 16 data is specified in the continuous mode (CEnCTL0.CEnTMS bit =
CEnEMF
• This flag is set to 1 when the CEnCTL0.CEnPWR register is cleared to 0 or when
• If the data written to the CSIBUFn register has been transferred, the CEnEMF bit
CEnFLF
Because all the CSIBUFn pointers are cleared to 0, the remaining data in the
CSIBUFn register is ignored.
If 1 is written to the CEnPCT bit, be sure to read the CEnSTR register to check to
see if all the CSIBUFn pointers have been correctly cleared to 0 (CEnFLF bit = 0,
CEnEMF bit = 1, CEnSFP3 to CEnSFP0 bits = 0000). Writing to the CEnPCT bit
is prohibited before confirming that all CSIBUFn pointers have been cleared to 0
without fail.
when the CEnPCT bit is set to 1.
1) (CEnCTL0.CEnTMS bit = 0000), the CEnFLF bit is set to 1 in the same way as
in the single mode (CEnCTL0.CEnTMS bit = 1) when 16 data are in the CSIBUFn
register. If even one of the data has been completely transferred, the CEnFLF bit
is cleared to 0. However, this does not mean that the CSIBUFn register has a
vacancy. In this case, writing the next transmission data to the CSIBUFn register
is prohibited. Even if the data is written to the CSIBUFn register, it is not
transferred. If a data reception process is executed, the received data is
overwritten. To execute the next transfer, be sure to wait until all transfers have
completed, then write 1 to the CEnPCT bit to clear (0) the all CSIBUFn pointers.
the CEnPCT bit is set to 1.
is set to 1 (even if receive data is stored in the CSIBUFn register).
< >
0
1
0
1
0
1
No operation
Clear all CSIBUFn pointers to 0.
CSIBUFn register has a vacancy.
CSIBUFn register is full.
Data is in CSIBUFn register.
CSIBUFn register is empty.
R/W
CEnFLF CEnEMF CEnTSF CEnSFP3 CEnSFP2 CEnSFP1 CEnSFP0
< >
This flag indicates the empty status of the CSIBUFn register
This flag indicates the full status of the CSIBUFn register
Address: CE0STR FFFFFB08H, CE1STR FFFFFB48H
User’s Manual U19601EJ2V0UD
< >
Specifies clearing of the CSIBUFn pointer
< >
(1/2)