UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 995

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UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.7.6 Operation when arbitration loss occurs (no communication after arbitration loss)
(1) When arbitration loss occurs during transmission of slave address data
(2) When arbitration loss occurs during transmission of extension code
ST
ST
Δ 2: IICSn register = 00000001B
IICCn.LRELn bit is set to 1 by software
Δ 2:
Remarks 1.
Remarks 1.
1: IICSn register = 01000110B (Example: When IICSn.ALDn bit is read during interrupt servicing)
1:
AD6 to AD0
AD6 to AD0
IICSn register = 0110X010B (Example: When ALDn bit is read during interrupt servicing)
IICSn register = 00000001B
2. n = 0 to 3 (V850ES/JH3-E)
2. n = 0 to 3 (V850ES/JH3-E)
Δ: Generated only when IICCn.SPIEn bit = 1
n = 0 to 4 (V850ES/JJ3-E)
Δ: Generated only when SPIEn bit = 1
X: don’t care
n = 0 to 4 (V850ES/JJ3-E)
: Always generated
: Always generated
R/W
R/W
1
ACK
ACK
1
D7 to D0
D7 to D0
User’s Manual U19601EJ2V0UD
CHAPTER 20 I
ACK
ACK
2
C BUS
D7 to D0
D7 to D0
ACK
ACK
SP
SP
Δ2
Δ2
993

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