UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 197

• Manufacturer Part Number: UPD70F3785GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3785GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.5.3
If a high level is input to the DRST pin at this time, the on-chip debug mode is set, and the DCK, DMS, DDI, and DDO
pins can be used.
above action is taken.
Handle the P54 pin with the utmost care.
4.5.4
down resistor is connected. The pull-down resistor is disconnected when the OCDM0 bit is cleared (0).
4.5.5
4.5.6
The DRST, DCK, DMS, DDI, and DDO pins are on-chip debug pins.
After reset by the RESET pin, the P54/INTP11/DRST pin is initialized to function as an on-chip debug pin (DRST).
The following action must be taken if on-chip debugging is not used.
• Clear the OCDM0 bit of the OCDM register (special register) (0)
At this time, fix the P54/INTP11/DRST pin to low level from when reset by the RESET pin is released until the
If a high level is input to the DRST pin before the above action is taken, it may cause a malfunction (CPU deadlock).
Caution After reset by the WDT2RES signal, clock monitor (CLM), or low-voltage detector (LVI), the
The P54/INTP11/DRST pin has an internal pull-down resistor (30 kΩ TYP.). After a reset by the RESET pin, a pull-
When the power is turned on, the following pins may output an undefined level temporarily even during reset.
• P51/INTP08/DDO pin
In port mode, the following port pins do not have hysteresis characteristics.
P02, P03
P20 to P27
P30 to P37
P40 to P48
P50 to P59
P60 to P65
P90 to P915
Cautions on on-chip debug pins (V850ES/JH3-E only)
Cautions on P54/INTP11/DRST pin
Cautions on P51 pin when power is turned on
Hysteresis characteristics
P54/INTP11/DRST pin is not initialized to function as an on-chip debug pin (DRST). The OCDM
register holds the current value.
CHAPTER 4 PORT FUNCTIONS
User’s Manual U19601EJ2V0UD
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