UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 38

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UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD70F3785GJ-GAE-AX
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36
(9) Real-time counter (for watch)
(10) Watchdog timer 2
(11) Serial interface
(12) A/D converter
(13) DMA controller
(14) Key interrupt function
(15) Real-time output function
The real-time counter counts the reference time (one second) for watch counting based on the subclock
(32.768 kHz) or main clock. This can simultaneously be used as the interval timer based on the main clock.
Hardware counters dedicated to year, month, day of week, day, hour, minute, and second are provided, and
can count up to 99 years.
A watchdog timer is provided on chip to detect inadvertent program loops, system abnormalities, etc.
The internal oscillation clock, the main clock, or the subclock can be selected as the source clock.
Watchdog timer 2 generates a non-maskable interrupt request signal (INTWDT2) or a system reset signal
(WDT2RES) after an overflow occurs.
The V850ES/JH3-E and V850ES/JJ3-E include eight kinds of serial interfaces (asynchronous serial interface
C (UARTC), asynchronous serial interface B with FIFO (UARTB), 3-wire variable-length serial interface F
(CSIF), 3-wire variable-length serial interface E with FIFO (CSIE), an I
(CAN)
UARTC transfers data via the TXDC0 to TXDC5 and RXDC0 to RXDC5 pins.
UARTB transfers data via the TXDB0, TXDB1, RXDB0, and RXDB1 pins.
CSIF transfers data via the SOF0 to SOF6, SIF0 to SIF6, and SCKF0 to SCKF6 pins.
CSIE transfers data via the SOE0, SOE1, SIE0, SIE1, SCKE0, and SCKE1 pins.
I
CAN
USBF transfers data via the UDMF and UDPF pins.
Ethernet transfers data via the P1COL, P1CRS, P1MDC, P1MDIO, P1RXCLK, P1RXD0, P1RXD1, P1RXD2,
P1RXD3, P1RXDV, P1RXER, P1TXCLK, P1TXD0, P1TXD1, P1TXD2, P1TXD3, P1TXEN, and P1TXER pins.
Note
This 10-bit A/D converter includes 10 or 12 analog input pins. Conversion is performed using the successive
approximation method.
A 4-channel DMA controller is provided on chip. This controller transfers data between the internal RAM, on-
chip peripheral I/O devices, and external memory in response to interrupt requests sent by on-chip peripheral
I/O devices.
A key interrupt request signal (INTKR) can be generated by inputting a falling edge to the key input pins (8
channels).
The real-time output function transfers preset 6/8-bit data to output latches upon the occurrence of a timer
compare register match signal.
2
C transfers data via the SDA00 to SDA04 and SCL00 to SCL04 pins.
Note
Note
μ
PD70F3783, 70F3786 only
transfers data via the CRXD0
, a USB function controller (USBF), and a Ethernet controller).
CHAPTER 1 INTRODUCTION
User’s Manual U19601EJ2V0UD
Note
and CTXD0
Note
pins.
2
C bus interface (I
2
C), a CAN controller

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