UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 1172

• Manufacturer Part Number: UPD70F3785GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3785GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1170
CAN sleep mode
release by user
Note
Clear PSMODE0 bit = 1
Set PSMODE0 bit = 0
Clear PSMODE0 bit.
The state in which the CAN clock is supplied means the state in which the CAN sleep mode is set
without setting any of the following CPU standby modes.
• STOP mode
• IDLE1 and IDLE2 modes
• The main clock has been stopped in subclock operation mode or sub-IDLE mode
Figure 21-53. Clear CAN Sleep/Stop Mode
Clear PSMODE1 bit = 1
Set PSMODE1 bit = 0
CHAPTER 21 CAN CONTROLLER
Clear PSMODE1 bit.
After dominant edge
Clear CINTS5 bit = 1
PSMODE0 bit = 0
CAN sleep mode
Clear CINTS5 bit.
CAN stop mode
CINTS5 bit = 1
User’s Manual U19601EJ2V0UD
detection,
START
END
(When CAN clock is not supplied)
CAN sleep mode release when
CAN bus becomes active
Clear PSMODE0 bit = 1
Set PSMODE0 bit = 0
After dominant edge
Clear CINTS5 bit = 1
Clear PSMODE0 bit.
PSMODE0 bit = 0/1
Clear CINTS5 bit.
CINTS5 bit = 1
detection,
(When CAN clock is supplied
CAN sleep mode release when
CAN bus becomes active
Note
)