UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 187

• Manufacturer Part Number: UPD70F3785GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3785GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes 1. KR3 and TRGAB1 are alternate functions. When using the pin for the TRGAB1 function, disable key return detection of KR3, which is the alternate function
P93
P94
P95
Pin Name
2. When using as the A0 to A15 pins, be sure to set all 16 bits of the PMC9 register to FFFFH at once.
3. KR4 and TIAB13 are alternate functions. When using the pin for the TIAB13 function, disable key return detection of KR4, which is the alternate function (set
4. KR5 and EVTAB1 are alternate functions. When using the pin for the EVTAB1 function, disable key return detection of KR5, which is the alternate function (set
(set the KRM.KRM3 bit to 0). Also, when using the pin for the KR3 function, disable edge detection of TRGAB1, which is the alternate function (set the
TAB1IOC2.TAB1ETS1 and TAB1ETS0 bits to 00).
the KRM.KRM4 bit to 0). Also, when using the pin for the KR4 function, disable edge detection of TIAB13, which is the alternate function (set the
TAB1IOC1.TAB1IS7 and TAB1IS6 bits to 00).
the KRM.KRM5 bit to 0). Also, when using the pin for the KR5 function, disable edge detection of EVTAB1, which is the alternate function (set the
TAB1IOC2.TAB1EES1 and TAB1EES0 bits to 00).
TOAB1B2
TRGAB1
KR3
INTP14
A3
TOAB1T3
TOAB13
TIAB13
KR
INTP15
A4
TOAB1B3
EVTAB1
KR5
INTP16
A5
Alternate Function
Note 2
Note 2
Note 2
4Note 3
Name
Note 1
Note 4
Note 3
Note 4
Note 1
Output
Input
Input
Input
Output
Output
Output
Input
Input
Input
Output
Output
Input
Input
Input
Output
I/O
P93 = Setting not required PM93 = Setting not required PMC93 = 1
P93 = Setting not required PM93 = Setting not required PMC93 = 1
P93 = Setting not required PM93 = Setting not required PMC93 = 1
P93 = Setting not required PM93 = Setting not required PMC93 = 1
P93 = Setting not required PM93 = Setting not required PMC93 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P94 = Setting not required PM94 = Setting not required PMC94 = 1
P95 = Setting not required PM95 = Setting not required PMC95 = 1
P95 = Setting not required PM95 = Setting not required PMC95 = 1
P95 = Setting not required PM95 = Setting not required PMC95 = 1
P95 = Setting not required PM95 = Setting not required PMC95 = 1
P95 = Setting not required PM95 = Setting not required PMC95 = 1
Pn Register
Pnx Bit of
Table 4-18. Using Port Pin as Alternate-Function Pin (8/13)
PMn Register
PMnx Bit of
PMCn Register
PMCnx Bit of
PFCE93 = 0
PFCE93 = 0
PFCE93 = 0
PFCE93 = 1
PFCE93 = 1
PFCE94 = 0
PFCE94 = 0
PFCE94 = 0
PFCE94 = 0
PFCE94 = 1
PFCE94 = 1
PFCE95 = 0
PFCE95 = 0
PFCE95 = 0
PFCE95 = 1
PFCE95 = 1
PFCEn Register
PFCEnx Bit of
PFC93 = 0
PFC93 = 1
PFC93 = 1
PFC93 = 0
PFC93 = 0
PFC94 = 0
PFC94 = 0
PFC94 = 1
PFC94 = 1
PFC94 = 0
PFC94 = 1
PFC95 = 0
PFC95 = 1
PFC95 = 1
PFC95 = 0
PFC95 = 0
PFCn Register
PFCnx Bit of
KRM3 (KRM) = 0
TAB1ETS1, TAB1ETS0 (TAB1I0C1) = 0
KRM2 (KRM) = 0
TAB1TIS7, TAB1TIS6 (TAB1I0C1) = 0
KRM5 (KRM) = 0
TAB1EES1, TAB1EES0 (TAB1I0C1) = 0
(Registers)
Other Bits