UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 236

• Manufacturer Part Number: UPD70F3785GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3785GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) Edge detector
(5) Output controller
(6) Selector
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TAAnCNT register.
When the TAAnCTL0.TAAnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TAAnCNT register is
read at this time, 0000H is read.
Reset sets the TAAnCE bit to 0. Therefore, the 16-bit counter is set to FFFFH.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TAAnCCR0 register is used as a compare register, the value written to the TAAnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTAAnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
Reset clears the TAAnCCR0 register to 0000H. Therefore, the CCR0 buffer register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TAAnCCR1 register is used as a compare register, the value written to the TAAnCCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the
CCR1 buffer register, a compare match interrupt request signal (INTTAAnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
Reset clears the TAAnCCR1 register to 0000H. Therefore, the CCR1 buffer register is cleared to 0000H.
This circuit detects the valid edges input to the TIAAn0 and TIAAn1 pins. No edge, rising edge, falling edge, or
both the rising and falling edges can be selected as the valid edge by using the TAAnIOC1 and TAAnIOC2
registers.
This circuit controls the output of the TOAAn0 and TOAAn1 pins. The outputs of the TOAAn0 and TOAAn1 pins
are controlled by the TAAnIOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event
can be selected as the count clock.
Remark
n = 0 to 5
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
User’s Manual U19601EJ2V0UD