UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 425

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UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
inverted. When the count value of the 16-bit counter subsequently matches the set value of the TABnCCRm register,
a compare match interrupt request signal (INTTABnCCm) is generated, and the output signal of the TOABnm pin is
inverted.
generates an overflow interrupt request signal (INTTABnOV) at the next clock, is cleared to 0000H, and continues
counting. At this time, the overflow flag (TABnOPT0.TABnOVF bit) is also set to 1. Clear the overflow flag to 0 by
executing the CLR instruction by software.
at that time, and compared with the count value.
When the TABnCE bit is set to 1, TABn starts counting, and the output signals of the TOABn0 to TOABn3 pins are
The 16-bit counter continues counting in synchronization with the count clock. When it counts up to FFFFH, it
The TABnCCRm register can be rewritten while the counter is operating. If it is rewritten, the new value is reflected
Remark
TOABn3 pin output
Note The V850ES/JH3-E only includes the TOAB13 pin; it is not provided with the TOAB03 pin.
INTTABnCC0 signal
INTTABnCC1 signal
INTTABnCC2 signal
INTTABnCC3 signal
TABnCCR0 register
TABnCCR1 register
TABnCCR2 register
TABnCCR3 register
m = 0 to 3,
n = 0, 1
TOABn0 pin output
TOABn1 pin output
TOABn2 pin output
INTTABnOV signal
Figure 8-29. Basic Timing in Free-Running Timer Mode (Compare Function)
16-bit counter
TABnOVF bit
TABnCE bit
FFFFH
0000H
Note
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
D
D
10
10
D
20
D
User’s Manual U19601EJ2V0UD
30
D
00
D
20
Cleared to 0 by
CLR instruction
D
30
D
D
00
11
D
20
D
30
D
00
Cleared to 0 by
CLR instruction
D
11
D
11
D
21
D
31
D
D
01
21
D
31
CLR instruction
Cleared to 0 by
D
01
D
11
D
21
D
31
D
01
423

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