UPD70F3785GJ-GAE-AX Renesas Electronics America, UPD70F3785GJ-GAE-AX Datasheet - Page 1164

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UPD70F3785GJ-GAE-AX

Manufacturer Part Number
UPD70F3785GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3785GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3785GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
1162
Note
Cautions 1. Execute transmission abort processing by clearing the TRQ bit, not the RDY bit.
Figure 21-46. Transmission Abort Processing (Other Than in Normal Operation Mode with ABT)
During a period of a total of 11 bits, 3 bits of interframe space and 8 bits of suspend transmission, the
transmission request may have already been acknowledged by the protocol layer. Consequently,
transmission may not be aborted but started even if the TRQ bit is cleared.
2. Before making a sleep mode transition request, confirm that there is no transmission
3. The TSTAT bit can be periodically checked by a user application or can be checked after
4. Do not execute a new transmission request that includes other message buffers while
5. If data of the same message buffer are successively transmitted or if only one message
request left using this processing.
the transmit completion interrupt.
transmission abort processing is in progress.
buffer is used, judgments whether transmission has been successfully executed or failed
may contradict. In such a case, make a judgment by using the history information of the
C0TGPT register.
Wait for a period of 11 CAN
Transmission successful
Read C0LOPT register.
be aborted matches
Clear TRQ bit = 1
Message buffer to
C0LOPT register?
Set TRQ bit = 0
Clear TRQ bit.
TSTAT bit = 0?
data bits
START
CHAPTER 21 CAN CONTROLLER
END
Yes
Yes
Note
User’s Manual U19601EJ2V0UD
.
No
No
Transmit abort request
was successful.

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