TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 108

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

7.6
Exception / Interrupt-Related Registers
31-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
7.6.2.5
Bit
SETENA
Bit Symbol
(Interrupt 31)
(Interrupt 23)
(Interrupt 15)
(Interrupt 7)
SETENA
SETENA
SETENA
SETENA
Interrupt Set-Enable Register 1
Note:For descriptions of interrupts and interrupt numbers, see Section "7.5.1.5 List of Interrupt Sources".
31
23
15
0
0
0
7
0
R/W
Type
(Interrupt 30)
(Interrupt 22)
(Interrupt 14)
(Interrupt 6)
SETENA
SETENA
SETENA
SETENA
30
22
14
0
0
0
6
0
Interrupt number [31:0]
[Write]
1: Enable
[Read]
0: Disabled
1: Enabled
Each bit corresponds to the specified number of interrupts.
Writing "1" to a bit in this register enables the corresponding interrupt. Writing "0" has no effect.
Reading the bits can see the enable/disable condition of the corresponding interrupts.
(Interrupt 29)
(Interrupt 21)
(Interrupt 13)
(Interrupt 5)
SETENA
SETENA
SETENA
SETENA
29
21
13
0
0
0
5
0
(Interrupt 28)
(Interrupt 20)
(Interrupt 12)
(Interrupt 4)
Page 84
SETENA
SETENA
SETENA
SETENA
28
20
12
0
0
0
4
0
(Interrupt 27)
(Interrupt 19)
(Interrupt 11)
(Interrupt 3)
SETENA
SETENA
SETENA
SETENA
27
19
11
Function
0
0
0
3
0
(Interrupt 26)
(Interrupt 18)
(Interrupt 10)
(Interrupt 2)
SETENA
SETENA
SETENA
SETENA
26
18
10
0
0
0
2
0
(Interrupt 25)
(Interrupt 17)
(Interrupt 9)
(Interrupt 1)
SETENA
SETENA
SETENA
SETENA
25
17
0
0
9
0
1
0
TMPM362F10FG
(Interrupt 24)
(Interrupt 16)
(Interrupt 8)
(Interrupt 0)
SETENA
SETENA
SETENA
SETENA
24
16
0
0
8
0
0
0