TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 588
TMPM362F10FG
Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet
1.TMPM362F10FG.pdf
(744 pages)
Specifications of TMPM362F10FG
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
Details
Other names
Q5704184A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
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18.4
Key-on Wakeup Operation
18.4
CG to determine whether to use the key inputs for releasing the STOP mode or for normal interrupts. Setting <IN-
TLEN> to "1" causes all the key inputs, KEY0 to KEY3, to be used for interrupts for releasing the STOP mode.
KWUPCRn<KEYn> to define the active state of each key input pin to be used.
CGIMCGF in the CG as the active high level. Therefore, program CGIMCGF<EMCGL[2:0]> to "001" to deter-
mine the detection level to the high level.
rupts. In this case, to be detected interrupt request by the CPU, "High" pulse or "High" level signal must be input.
"1010" to KWUPCLR<KEYCLR[3:0]> during interrupt processing clears all the key interrupt requests.
TMPM362F10FG has 4 key input pins, KEY0 to KEY3. Program the CGIMCGF<INTLEN> register in the
Program KWUPCRn<KEYnEN> to enable or disable interrupt inputs for each key input pin. Also, program
Detection of key inputs is carried out in the KWUP block, and the detection results are notified to the
Setting CGINCGF<INTLEN> to "0" (default) configures all the input pins, KEY0 to KEY3 to the normal inter-
Program KWUPCRn in the same way to enable or disable each key input and define their active states. Writing
Note:If two or more key inputs are generated, all the key input requests will be cleared by clearing interrupt requests.
Key-on Wakeup Operation
Page 564
TMPM362F10FG
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