TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 407

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
Table 12-4 Clock resolution to the Baud Rate Generator fc = 64 MHz, fs = 32.768kHz
12.7
φT0 selection
CGSYSCR
<FPSEL1>
12.7.1
0
Clock Control
SCxMOD0<SC[1:0]> = "11".
tion frequency 32MHz) show the resolution of the input clock to the baud rate generator.
There is a 7-bit prescaler to divide a prescaler input clock φT0 by 2, 8, 32 and 128.
Use the CGSYSCR register in the clock / mode control block to select the input clock φT0 of the prescaler.
The prescaler becomes active only when the baud rate generator is selected as a transfer clock by
Table 12-4 (operation frequency 64MHz), Table 12-5 (operation frequency 48MHz) and Table 12-6 (opera-
Prescaler
clock selection
CGSYSCR
<FPSEL0>
Peripheral
0 (fgear)
<GEAR[2:0]>
CGSYSCR
Clock gear
100 (fc/2)
101 (fc/4)
110 (fc/8)
000 (fc)
value
Prescaler clock se-
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
<PRCK[2:0]>
CGSYSCR
lection
Page 383
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
1
2
2
3
3
3
4
4
4
4
(0.0312 μs)
(0.0625 μs)
(0.0625 μs)
5
6
5
6
7
5
6
7
8
5
6
7
8
9
(0.125 μs)
(0.125 μs)
(0.125 μs)
φT1
(0.25 μs)
(0.25 μs)
(0.25 μs)
(0.25 μs)
(0.5 μs)
(1.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
Prescaler output clock resolution
3
10
10
11
4
4
5
6
7
8
5
6
7
8
9
5
6
7
8
9
6
7
8
9
(0.125 μs)
φT4
(0.25 μs)
(0.25 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
13
10
10
11
10
11
10
11
12
9
12
5
6
7
8
9
6
7
8
9
7
8
9
8
φT16
(128.0 μs)
(12.8 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(16.0 μs)
(32.0 μs)
(16.0 μs)
(32.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(64.0μs)
(64.0μs)
TMPM362F10FG
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
13
13
14
13
14
15
10
11
12
10
11
12
10
11
10
11
12
12
7
8
9
8
9
9
φT64
(128.0 μs)
(128.0 μs)
(256.0 μs)
(128.0 μs)
(256.0 μs)
(512.0 μs)
(16.0 μs)
(32.0 μs)
(64.0 μs)
(16.0 μs)
(32.0 μs)
(64.0 μs)
(16.0 μs)
(32.0 μs)
(16.0 μs)
(32.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(8.0 μs)
(8.0 μs)
(64.0μs)
(64.0μs)

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