TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 495

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

Table 14-2 Processing in Slave Mode
<TRX>
1
0
<AL>
1
0
1
0
<AAS>
1
1
0
1
0
1
0
<AD0>
1/0
1/0
1/0
0
0
0
0
Arbitration Lost is detected while the slave address
was being transmitted and the SBI received a slave
address with the direction bit "1" transmitted by an-
other master.
In the slave receiver mode, the SBI received a
slave address with the direction bit "1" transmitted
by the master.
In the slave transmitter mode, the SBI has comple-
ted a transmission of one data word.
Arbitration Lost is detected while a slave address is
being transmitted, and the SBI receives either a
slave address with the direction bit "0" or a general-
call address transmitted by another master.
Arbitration Lost is detected while a slave address
or a data word is being transmitted, and the trans-
fer is terminated.
In the slave receiver mode, the SBI received either
a slave address with the direction bit "0" or a general-
call address transmitted by the master.
In the slave receiver mode, the SBI has completed
a reception of a data word.
State
Page 471
Set the number of bits in a data word to <BC[2:0]>
and write the transmit data into SBIxDBR.
Test LRB. If it has been set to "1", that means the re-
ceiver does not require further data. Set <PIN> to 1
and reset <TRX> to 0 to release the bus. If <LRB>
has been reset to "0", that means the receiver re-
quires further data. Set the number of bits in the da-
ta word to <BC[2:0]> and write the transmit data to
the SBIxDBR.
Read the SBIxDBR (a dummy read) to set <PIN>
to 1, or write "1" to <PIN>.
Set the number of bits in the data word to <BC
[2:0].> and read the received data from SBIxDBR.
Processing
TMPM362F10FG