TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 594

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

19.3
BACKUP Mode Operation
19.3
19.3.1
ter reset). In the BACKUP mode, single boot mode (MCU starts from built-in boot ROM after reset) is not supported.
19.3.1.1
The BACKUP mode only corresponds to the single chip mode (MCU starts from the built-in flash memory af-
BACKUP Mode Operation
(BACKUP SLEEP and BACKUP STOP). The BACKUP mode (BACKUP SLEEP and BACKUP STOP)
will return the preceding mode of transition by release source.
Operable peripherals in the BACKUP mode
(Power on shut down block
and perform internal reset)
(Power on shut down block
and perform internal reset)
・ In the BACKUP SLEEP mode
・ In the BACKUP STOP mode
Note 1: In case that low-speed oscillator is stopped in the NORMAL mode, make sure to start the low-speed oscilla-
Note 2: The program for changing to the BACKUP mode must be executed in the built-in flash ROM or built-in RAM.
Figure 19-2 shows the state transition between NORMAL mode, SLOW mode and BACKUP mode
In addition, each mode changes to the reset processing routine if the reset operation occurs.
Transition to the BACKUP mode
(RTC), low speed oscillator, data in BACKUP RAM (8KB)
Port output, Key-on-wakeup (KWUP), CEC, remote control circuit (RMC), real-time clock
Port output, Key-on-wakeup (KWUP), data in BACKUP RAM (8KB)
tion and confirm the stable oscillation before changing to BACKUP SLEEP mode.
BACKUP SLEEP mode
Figure 19-2 BACKUP Mode Transition Diagram
Releasing source
Releasing source
Instruction
Instruction
(Note 1)
Instruction
NORMAL mode
External reset
SLOW mode
Page 570
After reset
Instruction
Instruction
Instruction
Releasing source
BACKUP STOP mode
Releasing source
(Power on shut down block
and perform internal reset)
(Power on shut down block
and perform internal reset)
TMPM362F10FG