TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 579

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

18. Key-on Wakeup
18.1
18.2
KWUP
0 to 3
<KEYnEN>
Outline
Block Diagram
・ TMPM362F10FG has 4 key input, KWUP0 to KWUP3, which can be used for releasing STOP mode or
・ The active state of each input can be configured to the rising edge, the falling edge, both edge, the high lev-
・ An interrupt request is cleared by programming the key interrupt request clear register KWUPCLR in the
・ The KWUP input pins have pull-up functions, which can be switched between static pull-up and dynam-
fs
for external interrupts. Note that interrupt processing is executed with one interrupt factor for 4 inputs.
(This is programmed in the CG block) Each key input can be configured to be used or not, by program-
ming (KWUPCRn<KEYnEN>).
el or the low level, by programming KWUPCRn<KEYn>.
interrupt processing.
ic pull-up by programming the KWUPCRn<DPEn>. This programming is needed for each of 4 inputs.
Static Pull-up
1
Sampling at the end of
DPUP period
Dynamic Pull-up
fs
Figure 18-1 Key-on Wakeup Block Diagram
1
<DPEn>
<DPEn>
1
Enable rising edge
1
1
Enable
falling
edge
Clear by reading
flag or
claer by writing
register
Page 555
High level /
Low level
Level / Edge
IPH
IPH
IPH
IPH
TMPM362F10FG
INTC
(Interrupt
KWUPINT
Register
KWUPPKEY
Register
Controler)