TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 203

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

8.2.10
Type
8.2.10.1
8.2.10.2
put of the AD converter , Key-on wake-up function and a AD trigger input function.
triger input function.
Port J data register
Port J function register 2
Port J pull-up control register
Port J input control register
The port J is an 8-bit input port. Besides the general-purpose input function, the port J receives an analog in-
Reset initializes all bits of the port J as Analog input ports with input and pull-up disabled.
Set the PJFR2 and PJIE when you use the port J as input pins of the key-on wake-up function and the AD
To use the port J as an analog input of the AD converter, disable input on PJIE and disable pull-up on PJPUP.
Port J (PJ0 to PJ7)
Note:Unless you use all the bits of port J as analog input pins, conversion accurary may be reduced.Be
Port J Circuit Type
Port J register
sure to verify that this causes no problem on your system.
T19
7
T19
6
Register name
T19
5
Page 179
T19
4
PJDATA
PJPUP
PJFR2
PJIE
T18
3
T17
Base Address = 0x400C_0900
2
Address (Base+)
0x000C
0x002C
0x0000
0x0038
T17
1
TMPM362F10FG
T17
0