TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 381

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

Figure 11-7 One-shot Pulse Output Triggered by an External Pulse (Without Delay)
[Main processing] Capture setting by TBxIN0
Set PORT registers.
Set PORT registers.
[Processing of INTCAPx0 interrupt service routine] Pulse output setting
[Processing of INTTBx interrupt service routine] Output disable
TBxEN
TBxRUN
TBxMOD
TBxFFCR
Interrupt Set-Enable
Register
TBxRUN
TBxRG0
TBxRG1
TBxFFCR
TBxIM
Interrupt Set-Enable
Register
TBxFFCR
Interrupt enable clear
register
ing TBxIN0 input at the rising edge. (φT1 is selected for counting.)
sum of the TBxCP0 value (c) and the one-shot pulse width (p), (c + p), by generating the INTCAPx0 inter-
rupt. TBxRG1 change must be completed before the next match.
interrupt.
Note 1: m ; corresponding bit of port
Note 2: X; Don’t care
The followings show the settings in the case that 2 ms width one-shot pulse is output after 3ms by trigger-
If a delay is not required, TBxFF0 is reversed when data is taken into TBxCP0, and TBxRG1 is set to the
TBxFF0 is enabled to reverse when UC matches with TBxRG1, and is disabled by generating the INTTBx
Count clock
(Internal clock)
TBxIN0 pin input
(External trigger pulse)
Match with TBxRG1
Timer outut
TBxOUT pin
Enable reverse when data
is taken into TBxCP0.
−; No change
← 1
← X
← X
← X
← *
← *
← *
← *
← *
← *
←
← X
← *
← X
← *
7
X
6
X
X
0
X
*
*
*
*
*
*
X
X
*
X
*
5
X
X
1
0
*
*
*
*
*
*
−
X
*
−
*
c
4
X
X
0
0
*
*
*
*
*
*
−
X
*
−
*
Enable reverse
Taking data into the capture register TBxCP0
INTCAPx0
generation
Pulse width
3
X
X
1
0
*
*
*
*
*
*
1
X
*
0
*
(p)
2
X
0
0
0
*
1
*
*
*
*
1
1
*
0
*
Page 357
1
X
X
0
1
*
X
*
*
*
*
−
0
*
−
*
0
X
0
1
0
*
1
*
*
*
*
−
1
*
−
*
c + p
INTTBx
generation
Disable reverse when data
is taken into TBxCP1.
Allocates corresponding port to TBxIN0.
Enables TMRBx operation.
Stops count operation.
Changes source clock to φT1. Fetches a count value into
the TBxCP0 at the rising edge of TBxIN0.
Clears TBxFF0 reverse trigger and disables.
Allocates corresponding port to TBxOUT.
Permits to generate interrupts specified by INTCAPx0 inter-
rupt corresponding bit by setting to "1".
Starts the TMRBx module.
Sets count value. (TBxCAP0 + 3ms/φT1)
Sets count value.(TBxCAP0 + (3+2)ms/φT1)
Reverses TBxFF0 if UC consistent with TBxRG0 and
TBxRG1.
Masks except TBxRG1 correspondence interrupt.
Permits to generate interrupt specified by INTTBx interrupt
corresponding bit setting to "1".
Clears TBxFF0 reverse trigger setting.
Prohibits interrupts specified by INTTBx interrupt correspond-
ing bit by setting to "1".
Taking data into the capture
register TBxCP1.
TMPM362F10FG