TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 667

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
Table 22-6 Transfer Format for the RAM Transfer Command
Boot
ROM
RAM
22.2.9.1
1 byte
2 byte
3 byte
4 byte
5 byte
to
16 byte
17 byte
18 byte
19 byte
20 byte
21 byte
22 byte
23 byte
24 byte
25 byte
26 byte
27 byte
to
mbyte
m+ 1 byte
m+ 2 byte
m+ 3 byte
Note 1: In I/O Interface mode, the baud rate for the transfers of the first and second bytes must be 1/16 of
Note 2: In case of any negative acknowledge, the boot program returns to a state in which it waits for a com-
Note 3: The 19th to 25th bytes must be within the RAM address range from 0x2000_0400 through the end ad-
Byte
RAM Transfer
the desired baud rate.
mand code (3rd byte). In I/O Interface mode, if a communication error occurs, a negative acknowl-
edge does not occur.
dress of RAM.
Serial operation mode and baud rate
For UART mode : 0x86
For I/O Interface mode : 0x30
Command code (0x10)
Password sequence (12 bytes))
0x3F8F_FFF4 to 0x3F8F_FFFF
Check SUM value for bytes 5 to 16
RAM storage start address 31 to 24
RAM storage start address 23 to 16
RAM storage start address 15 to 8
RAM storage start address 7 to 0
RAM storage start address 15 to 8
RAM storage start address 7 to 0
Check SUM value for bytes 19 to 24
RAM storage data
Checksum value for bytes 27 to m
Data Transferred from the Controller to the
TMPM362F10FG
Page 643
Desired baud
rate (Note 1)
Baud rate
ACK for the serial operation mode byte
・For UART mode
- Normal acknowledge : 0x86
(The boot program aborts if the baud rate can
not be set correctly.)
・For I/O Interface mode
- Normal acknowledge :0x30
ACK for the command code byte (Note 2)
- Normal acknowledge : 0x10
- Negative acknowledge : 0xX1
- Communication error : 0xX8
ACK for the checksum byte (Note 2)
- Normal acknowledge : 0x10
- Negative acknowledge : 0xX1
- Communication error : 0xX8
ACK for the checksum byte (Note 2)
- Normal acknowledge : 0x10
- Negative acknowledge : 0xX1
- Communication error : 0xX8
ACK for the checksum byte (Note 2)
- Normal acknowledge : 0x10
- Negative acknowledge : 0xX1
- Communication error : 0xX8
Jump to RAM storage start address
Data Transferred from the TMPM362F10FG to
the Controller
TMPM362F10FG

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