EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 372

IC STRATIX FPGA 20K LE 780-FBGA

EP1S20F780I6N

Manufacturer Part Number
EP1S20F780I6N
Description
IC STRATIX FPGA 20K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S20F780I6N

Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
586
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
586
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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EP1S20F780I6N
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Part Number:
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0
TriMatrix Memory
2–4
Stratix Device Handbook, Volume 2
storage. The parity bit, along with logic implemented in logic elements
(LEs), can implement parity checking for error detection to ensure data
integrity. Parity-size data words can also store user-specified control bits.
Byte Enable Support
In the M4K and M-RAM blocks, byte enables can mask the input data so
that only specific bytes of data are written. The unwritten bytes retain the
previous written value. The write enable signals (wren), in conjunction
with the byte enable signals (byteena), controls the RAM block’s write
operations. The default value for the byteena signals is high (enabled),
in which case writing is controlled only by the wren signals.
Asserting the clear port of the byte enable registers drives the byte enable
signals to their default high level.
M4K Blocks
M4K blocks support byte writes when the write port has a data width of
16, 18, 32, or 36 bits.
Notes to
(1)
(2)
[0] = 1
[1] = 1
[2] = 1
[3] = 1
Table 2–4. Byte Enable for M4K Blocks
Any combination of byte enables is possible.
Byte enables can be used in the same manner with 8-bit words, i.e., in 16 and 32
modes.
byteena
Table
2–4:
Table 2–4
summarizes the byte selection.
datain 18
[17..9]
[8..0]
Notes
(1),
(2)
Altera Corporation
datain 36
[26..18]
[35..27]
[17..9]
[8..0]
July 2005

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