EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 817

• Manufacturer Part Number: EP1S20F780I6N
• Description: IC STRATIX FPGA 20K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F780I6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 586
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 18460
• # I/os (max): 586
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 18460
• Ram Bits: 1669248
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Figure 12–22. Converting POF Programming File to Intel HEX Format
Altera Corporation
September 2004
Partial Programming File Generation
In remote update mode, the Quartus II CPF utility allows an existing
application configuration page to be replaced with new data, or a new
application configuration to be added. Partial programming files are
generated to perform such configuration data updates.
In order to generate a partial programming file, you have to input the
initial POF and new configuration data (SOF) to the Quartus II CPF
utility. In addition, you have to specify the addressing mode (auto or
manual) that was used during initial POF creation. And if block
addressing was used, you should specify the block start and end
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
12–39