EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 598

• Manufacturer Part Number: EP1S20F780I6N
• Description: IC STRATIX FPGA 20K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F780I6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 586
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 18460
• # I/os (max): 586
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 18460
• Ram Bits: 1669248
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Finite Impulse Response (FIR) Filters
7–20
Stratix Device Handbook, Volume 2
Table 7–9. Decomposition of a 16-Tap Interpolating Filter into Four Polyphase Filters
Output Sample
y(0), y(4)...
y(1), y(5)...
y(2), y(6)...
y(3), y(7)...
where:
This equation implies that the first polyphase filter, h
h(0), h(I), h(2I),..., h((P-1)I). The second polyphase filter, h
coefficients h(1), h(1+I), h(1+2I), ..., h(1+(P-1)I). Continuing in this way,
the last polyphase filter, hI
- 1) + 2I), ..., h((I - 1) + (P-1)I).
An example helps in understanding the polyphase implementation of
interpolation. Consider the polyphase representation of a 16-tap low pass
filter with an interpolation factor of 4. Thus, the output is given below:
Referring back to
the input are x(0), x(4), x(8,) and x(12). The first output, y(0), only depends
on h(0), h(4), h(8) and h(12) because x(i) is zero for i 0, 4, 8, 12.
shows the coefficients required to generate output samples.
Table 7–9
parallel polyphase filters. This is shown in
the filters are multiplexed to generate the overall output. The multiplexer
is controlled by a counter, which counts up modulo-I starting at 0.
It is illuminating to compare the computational requirements of the direct
implementation versus polyphase implementation of the low pass filter.
In the direct implementation, the number of computations per cycle
k = 0,1, …, I-1
n = 0,1, …, P-1
P = L/I = length of polyphase filters
L = length of the filter (selected to be a multiple of I)
I = interpolation factor
h(n) = original filter impulse response
y n
Coefficients Required
h(2), h(6), h(10), h(14)
h(3), h(7), h(11), h(15)
shows that this filter operation can be represented by four
h(0), h(4), h(8), h(12)
h(1), h(5), h(9), h(13)
=
i
15
=
0
h n iI
Figure 7–11 on page
–
x i
-1
(n), has coefficients h(I-1), h((I - 1) + N), h((I
Polyphase Filter Impulse Response
7–19, the only nonzero samples of
Figure
7–12. The outputs from
h
h
h
h
0
1
2
3
0
(n)
(n)
(n)
(n)
(n), has coefficients
Altera Corporation
September 2004
1
(n), has
Table 7–9