EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 666

IC STRATIX FPGA 20K LE 780-FBGA

EP1S20F780I6N

Manufacturer Part Number
EP1S20F780I6N
Description
IC STRATIX FPGA 20K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S20F780I6N

Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
586
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
586
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S20F780I6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
0
I/O Characteristics for XSBI, XGMII & XAUI
8–22
Stratix Device Handbook, Volume 2
Note to
(1)
Output differential voltage (V
Output offset voltage (V
Output Impedance, single ended
Change in V
Change in V
Input voltage range (V
Differential impedance
Input differential voltage (V
Receiver differential input impedance
Ground potential difference (between PCS and PMA)
Rise and fall times (20% to 80%)
Table 8–10. XSBI DC Specifications
Larger V
Table
OD
OS
OD
8–10:
between ‘0’ and ‘1’
between ‘0’ and ‘1’
is possible for better signal intensity.
Parameter
I
)
OS
)
ID
)
OD
Software Implementation
You can use the Assignment Organizer in the Altera
software to implement the I/O standards for a particular interface. For
example, set the I/O standard to LVDS for XSBI and to HSTL Class I for
XGMII. You can use the MegaWizard
PLLs and transmitter and receiver SERDES blocks for the XSBI
implementation and PLLs and DDR input and output circuitry for the
XGMII implementation. For more information on the Assignment
Organizer or MegaWizard Plug-In Manager, see the Quartus II Software
Help.
AC/DC Specifications
Table 8–10
and Stratix GX devices, that are based on the ANSI/TIA-644 LVDS
specification.
I/O characteristics for the 1.5-V HSTL standard for Stratix and Stratix GX
devices are shown in
specifications available in 10-Gigabit Ethernet draft IEEE P802.3ae.
)
lists the XSBI DC electrical characteristics, similar to Stratix
Figure 8–17
1,125
Min
250
900
100
100
40
70
and comply with XGMII electrical
®
Value
Typ
100
Plug-In Manager to create the
400
1,375
1,600
Max
140
600
130
400
50
50
50
®
(1)
Quartus
Altera Corporation
®
July 2005
Unit
II
mV
mV
mV
mV
mV
mV
mV
W
W
ps
W

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