EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 520

IC STRATIX FPGA 20K LE 780-FBGA

EP1S20F780I6N

Manufacturer Part Number
EP1S20F780I6N
Description
IC STRATIX FPGA 20K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S20F780I6N

Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
586
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
586
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S20F780I6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
0
Differential I/O Termination
Figure 5–35. PCML Differential Termination
5–48
Stratix Device Handbook, Volume 2
Transmitter
Differential
50 Ω
Differential HSTL Termination
The HSTL Class I and II I/O standards require a 0.75-V V
V V
termination for HSTL Class I and II I/O standard.
Figure 5–36. Differential HSTL Class I Termination
TT
Transmitter
.
Differential
Figures 5–36
50 Ω
and
Z
Z
0
0
= 50 Ω
= 50 Ω
Z
Z
5–37
0
0
= 50 Ω
= 50 Ω
50 Ω
show the device with differential
V
50 Ω
TT
V
TT
= 0.75 V
50 Ω
50 Ω
V
TT
= 0.75 V
Differential
Receiver
Altera Corporation
REF
Differential
Receiver
and a 0.75-
July 2005

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