h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 1018

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 23A Power-Down Modes [HD64F2636F, HD64F2638F, HD6432636F, HD6432638F,
HD64F2630F, HD6432630F, HD64F2635F, HD6432635F, HD6432634F]
Bit 7— Clock Output Disable (PSTOP): In combination with the DDR of the applicable port,
this bit controls output. See section 23A.8, Clock Output Disable Function for details.
Bit 7
PSTOP
0
1
Bits 6 to 4—Reserved: These bits are always read as 0 and cannot be modified.
Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Bits 2 to 0—System Clock Select (SCK2 to SCK0): These bits select the bus master clock in
high-speed mode, and medium-speed mode.
Rev. 6.00 Feb 22, 2005 page 958 of 1484
REJ09B0103-0600
Bit 3
STCS
0
1
Bit 2
SCK2
0
1
Bit 1
SCK1
0
1
0
1
High-Speed Mode,
Medium-Speed Mode
Fixed high
Description
Specified multiplication factor is valid after transition to software standby mode
Specified multiplication factor is valid immediately after STC bits are rewritten
output (initial value)
Bit 0
SCK0
0
1
0
1
0
1
Description
Bus master in high-speed mode
Medium-speed clock is /2
Medium-speed clock is /4
Medium-speed clock is /8
Medium-speed clock is /16
Medium-speed clock is /32
Sleep Mode
Fixed high
output
Description
Software
Standby Mode
Fixed high
Fixed high
High impedance
Hardware
Standby Mode
High impedance
(Initial value)
(Initial value)

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