h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 650

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 I
Table 15-7 Permissible SCL Rise Time (t
Rev. 6.00 Feb 22, 2005 page 590 of 1484
REJ09B0103-0600
IICX
0
1
SCL and SDA input is sampled in synchronization with the internal clock. The AC timing
therefore depends on the system clock cycle t
section 24, Electrical Characteristics. Note that the I
will not be met with a system clock frequency of less than 5 MHz.
The I
speed mode). In master mode, the I
one bit at a time during communication. If t
the time determined by the input clock of the I
extended. The SCL rise time is determined by the pull-up resistance and load capacitance of
the SCL line. To insure proper operation at the set transfer rate, adjust the pull-up resistance
and load capacitance so that the SCL rise time does not exceed the values given in the table
15-7.
t
Indication
7.5 t
17.5 t
cyc
2
C bus interface specification for the SCL rise time t
cyc
cyc
2
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
Standard
mode
High-speed
mode
Standard
mode
High-speed
mode
1000 ns
300 ns
1000 ns
300 ns
I
Specification
(Max.)
2
C Bus
2
C bus interface monitors the SCL line and synchronizes
Sr
5 MHz
1000 ns
300 ns
1000 ns
300 ns
) Values
sr
=
cyc
(the time for SCL to go from low to V
Time Indication
2
C bus interface, the high period of SCL is
, as shown in tables 24-19, 24-31, 24-43 in
2
C bus interface AC timing specifications
8 MHz
937 ns
300 ns
1000 ns
300 ns
=
sr
is under 1000 ns (300 ns for high-
10 MHz
750 ns
300 ns
1000 ns
300 ns
=
16 MHz
468 ns
300 ns
1000 ns 875 ns
300 ns
=
IH
) exceeds
20 MHz
375 ns
300 ns
300 ns
=