h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 991

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
Bits 2 to 0—System Clock Select 2 to 0 (SCK2 to SCK0): These bits select the bus master
clock.
22A.2.2 Low-Power Control Register (LPWRCR)
LPWRCR is an 8-bit readable/writable register that performs power-down mode control. The
following pertains to bits 1 and 0. For details of the other bits, see section 23A.2.3, 23B.2.3, Low
Power Control Register (LPWRCR). LPWRCR is initialized to H'00 by a reset and in hardware
standby mode. It is not initialized in software standby mode.
Bit 3
STCS
0
1
Bit 2
SCK2
0
1
Section 22A Clock Pulse Generator (H8S/2636 Group, H8S/2638 Group, H8S/2630 Group)
U-mask and W-mask versions only.
These functions cannot be used with the other versions.
Bit 1
SCK1
0
1
0
1
Description
Specified multiplication factor is valid after transition to software standby mode,
watch mode * , and subactive mode *
Specified multiplication factor is valid immediately after STC bits are rewritten
Bit 0
SCK0
0
1
0
1
0
1
Description
Bus master is in high-speed mode
Medium-speed clock is /2
Medium-speed clock is /4
Medium-speed clock is /8
Medium-speed clock is /16
Medium-speed clock is /32
Rev. 6.00 Feb 22, 2005 page 931 of 1484
¾
REJ09B0103-0600
(Initial value)
(Initial value)

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