h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 1062

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 23B Power-Down Modes [HD64F2636UF, HD6432636UF, HD64F2638UF,
HD6432638UF, HD64F2638WF, HD6432638WF, HD64F2639UF, HD6432639UF, HD64F2639WF,
HD6432639WF, HD64F2630UF, HD6432630UF, HD64F2630WF, HD6432630WF]
23B.12
Output of the clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the clock stops at the end of the bus cycle,
and output goes high. clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, clock output is disabled and input port mode is set.
Table 23B-8 shows the state of the pin in each processing state.
Using the on-chip PLL circuit to lower the oscillator frequency or prohibiting external clock
output also have the effect of reducing unwanted electromagnetic interference*. Therefore,
consideration should be given to these options when deciding on system board settings.
Note: * Electromagnetic interference: EMI (Electro Magnetic Interference)
Table 23B-8
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
Rev. 6.00 Feb 22, 2005 page 1002 of 1484
REJ09B0103-0600
DDR
PSTOP
Hardware standby mode
Software standby mode, watch
mode * , and direct transition
Sleep mode and subsleep mode *
High-speed mode, medium-speed
mode, and subactive mode *
Subactive mode
U-mask and W-mask versions, and H8S/2635 Group only.
These functions cannot be used with the other versions.
Clock Output Disabling Function
Pin State in Each Processing State
0
High impedance
High impedance
High impedance
High impedance
High impedance
1
0
High impedance
Fixed high
output
output
SUB
output
1
1
High impedance
Fixed high
Fixed high
Fixed high
Fixed high

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