h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 890

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 21B ROM (H8S/2638 Group, H8S/2639 Group, H8S/2630 Group)
5. The period for which the P bit in FLMCR1 is set (the write pulse width) should be changed
Item
Wait time after
P bit setting
Note: * Additional programming processing is necessary only when the reprogramming loop count
6. The program/program-verify flowchart for the H8S/2638, H8S/2639, and H8S/2630 are shown
Rev. 6.00 Feb 22, 2005 page 830 of 1484
REJ09B0103-0600
b. After write pulse application, a verify-read is performed in program-verify mode, and
c. If programming of other bits is incomplete in the 128 bytes, reprogramming processing
according to the degree of progress through the program/program-verify procedure. For
detailed wait time specifications, see section 24.2.7, 24.3.7, and 24.4.7, Flash Memory
Characteristics.
in figure 21B-12.
To cover the points noted above, bits on which reprogramming processing is to be executed,
and bits on which additional programming is to be executed, must be determined as shown
below.
Since reprogram data and additional-programming data vary according to the progress of the
programming procedure, it is recommended that the following data storage areas (128 bytes
each) be provided in RAM.
programming is judged to have been completed for bits read as 0. The following processing
is necessary for programmed bits.
When programming is completed at an early stage in the program/program-verify
procedure:
If programming is completed in the 1st to 6th reprogramming processing loop, additional
programming should be performed on the relevant bits. Additional programming should
only be performed on bits which first return 0 in a verify-read in certain reprogramming
processing.
When programming is completed at a late stage in the program/program-verify procedure:
If programming is completed in the 7th or later reprogramming processing loop, additional
programming is not necessary for the relevant bits.
should be executed. If a bit for which programming has been judged to be completed is
read as 1 in a subsequent verify-read, a write pulse should again be applied to that bit.
(n) is 1 to 6.
Symbol
t
sp
Item
When reprogramming loop count (n) is 1 to 6
When reprogramming loop count (n) is 7 or more
In case of additional programming processing *
t
t
Symbol
t
sp30
sp200
sp10