h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 660

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 I
Rev. 6.00 Feb 22, 2005 page 600 of 1484
REJ09B0103-0600
(Master transmit mode)
(Master transmit mode)
(Slave receive mode)
Though it is prohibited in the normal I
MST bit is erroneously set to 1 and a transition to master mode is occurred during data
transmission or reception in slave mode. In multi-master mode, pay attention to the setting of
the MST bit when a bus conflict may occur. In this case, the MST bit in the ICCR register
should be set to 1 according to the order below.
(a) Make sure that the BBSY flag in the ICCR register is 0 and the bus is free before setting
(b) Set the MST bit to 1.
(c) To confirm that the bus was not entered to the busy state while the MST bit is being set,
Note: Above restriction can be cleared by setting bits FNC1 and FNC0 in the ICXR register.
I
I
2
2
C bus interface
C bus interface
Other device
the MST bit.
check that the BBSY flag in the ICCR register is 0 immediately after the MST bit has been
set.
Figure 15-27 Diagram of Erroneous Operation when Arbitration is Lost
2
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
S
S
S
• Receive address is ignored
SLA
SLA
SLA
Transmit data match
Transmit timing match
R/W
R/W
R/W
A
A
A
2
C protocol, the same problem may occur when the
• Arbitration is lost
• The AL flag in ICSR is set to 1
• Automatically transferred to slave
• Receive data is recognized as an
• When the receive data matches to
receive mode
address
the address set in the SAR or SARX
register, the I
as a slave device.
SLA
DATA1
DATA2
2
C bus interface operates
Transmit data does not match
R/W
A
A
DATA3
DATA4
Data contention
A
A