h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 242

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 7 Bus Controller
(1) Consecutive Reads between Different Areas
If consecutive reads between different areas occur while the ICIS1 bit in BCRH is set to 1, an idle
cycle is inserted at the start of the second read cycle.
Figure 7-15 shows an example of the operation in this case. In this example, bus cycle A is a read
cycle from ROM with a long output floating time, and bus cycle B is a read cycle from SRAM,
each being located in a different area. In (a), an idle cycle is not inserted, and a collision occurs in
cycle B between the read data from ROM and that from SRAM. In (b), an idle cycle is inserted,
and a data collision is prevented.
Rev. 6.00 Feb 22, 2005 page 182 of 1484
REJ09B0103-0600
+5
+5
*
*
*
4,
B
+5
(a) Idle cycle not inserted
(ICIS1 = 0)
Figure 7-15 Example of Idle Cycle Operation (1)
+5
+5
*
*
4,
B
(b) Idle cycle inserted
(Initial value ICIS1 = 1)

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