h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 637

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.3.5
In slave receive mode, the master device outputs the transmit clock and transmit data, and the
slave device returns an acknowledge signal.
The slave device compares its own address with the slave address in the first frame following the
establishment of the start condition issued by the master device. If the addresses match, the slave
device operates as the slave device designated by the master device.
Figure 15-14 is a flowchart showing an example of slave receive mode operation.
SCL
(master output)
SDA
(slave output)
SDA
(master output)
IRIC
IRTR
ICDR
User processing
Figure 15-13 Example of Master Receive Mode Stop Condition Generation Timing
Section 15 I
Slave Receive Operation
Data 2
Bit 0
8
[6] IRIC clearance
[4] IRTR = 0
[3]
Data 1
2
A
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
[8]
1 clock cycle wait time
[4] IRTR = 1
9
[7] ACKB set to 1
[3]
Bit 7
[9] TRS set to 1
1
(MLS = ACKB = 0, WAIT = 1)
Data 2
[10] ICDR read (data 2)
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
2
[11] IRIC clearance
3
4
Data 3
5
6
Rev. 6.00 Feb 22, 2005 page 577 of 1484
7
[14] IRIC clearance
8
[15] WAIT cleared to 0
[13] IRTR = 0
[12]
IRIC clearance
A
[13] IRTR = 1
[12]
9
[16] ICDR read (data 3)
Data 3
REJ09B0103-0600
[17] Stop condition
issued
Stop condition
generated

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