h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 1031

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
23A.8
Output of the clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the clock stops at the end of the bus cycle,
and output goes high. clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, clock output is disabled and input port mode is set.
Table 23A-6 shows the state of the pin in each processing state.
Using the on-chip PLL circuit to lower the oscillator frequency or prohibiting external clock
output also have the effect of reducing unwanted electromagnetic interference*. Therefore,
consideration should be given to these options when deciding on system board settings.
Note: * Electromagnetic interference: EMI (Electro Magnetic Interference)
Table 23A-6
DDR
PSTOP
Hardware standby mode
Software standby
Sleep mode
High-speed mode, medium-speed
mode
Section 23A Power-Down Modes [HD64F2636F, HD64F2638F, HD6432636F, HD6432638F,
Clock Output Disabling Function
Pin State in Each Processing State
HD64F2630F, HD6432630F, HD64F2635F, HD6432635F, HD6432634F]
0
High impedance
High impedance
High impedance
High impedance
Rev. 6.00 Feb 22, 2005 page 971 of 1484
High impedance
1
0
Fixed high
output
output
1
1
High impedance
Fixed high
Fixed high
Fixed high
REJ09B0103-0600

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