h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 438

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 10 16-Bit Timer Pulse Unit (TPU)
10.7
Note that the kinds of operation and contention described below occur during TPU operation.
Input Clock Restrictions: The input clock pulse width must be at least 1.5 states in the case of
single-edge detection, and at least 2.5 states in the case of both-edge detection. The TPU will not
operate properly with a narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 10-48 shows the input clock
conditions in phase counting mode.
Caution on Period Setting: When counter clearing by compare match is set, TCNT is cleared in
the final state in which it matches the TGR value (the point at which the count value matched by
TCNT is updated). Consequently, the actual counter frequency is given by the following formula:
Where
Rev. 6.00 Feb 22, 2005 page 378 of 1484
REJ09B0103-0600
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Notes: Phase difference and overlap:
Figure 10-48 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
f =
Usage Notes
f : Counter frequency
N : TGR set value
Pulse width:
(N + 1)
: Operating frequency
Overlap
Pulse width
Phase
differ-
ence
Overlap
1.5 states or more
2.5 states or more
Phase
differ-
ence
Pulse width
Pulse width
Pulse width

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