h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 412

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 16-Bit Timer Pulse Unit (TPU)
10.4.5
In cascaded operation, two 16-bit counters for different channels are used together as a 32-bit
counter.
This function works by counting the channel 1 (channel 4) counter clock upon overflow/underflow
of TCNT2 (TCNT5) as set in bits TPSC2 to TPSC0 in TCR.
Underflow occurs only when the lower 16-bit TCNT is in phase-counting mode.
Table 10-6 shows the register combinations used in cascaded operation.
Note: When phase counting mode is set for channel 1 or 4, the counter clock setting is invalid
Table 10-6 Cascaded Combinations
Example of Cascaded Operation Setting Procedure: Figure 10-21 shows an example of the
setting procedure for cascaded operation.
Rev. 6.00 Feb 22, 2005 page 352 of 1484
REJ09B0103-0600
Combination
Channels 1 and 2
Channels 4 and 5
and the counter operates independently in phase counting mode.
<Cascaded operation>
Cascaded operation
Cascaded Operation
Set cascading
Start count
Figure 10-21 Cascaded Operation Setting Procedure
Upper 16 Bits
TCNT1
TCNT4
[1]
[2]
[1] Set bits TPSC2 to TPSC0 in the channel 1
[2] Set the CST bit in TSTR for the upper and lower
(channel 4) TCR to B'111 to select TCNT2
(TCNT5) overflow/underflow counting.
channel to 1 to start the count operation.
Lower 16 Bits
TCNT2
TCNT5