h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 735

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.2
17.2.1
There are four 16-bit read-only ADDR registers, ADDRA to ADDRD, used to store the results of
A/D conversion.
The 10-bit data resulting from A/D conversion is transferred to the ADDR register for the selected
channel and stored there. The upper 8 bits of the converted data are transferred to the upper byte
(bits 15 to 8) of ADDR, and the lower 2 bits are transferred to the lower byte (bits 7 and 6) and
stored. Bits 5 to 0 are always read as 0.
The correspondence between the analog input channels and ADDR registers is shown in
table 17-3.
ADDR can always be read by the CPU. The upper byte can be read directly, but for the lower
byte, data transfer is performed via a temporary register (TEMP). For details, see section 17.3,
Interface to Bus Master.
The ADDR registers are initialized to H'0000 by a reset, and in standby mode or module stop
mode.
Table 17-3 Analog Input Channels and Corresponding ADDR Registers
Group 0
AN0
AN1
AN2
AN3
Channel Set 0 (CH3 = 0)
A/D Data Registers A to D (ADDRA to ADDRD)
Register Descriptions
Group 1
AN4
AN5
AN6
AN7
Analog Input Channel
Group 0
AN8
AN9
AN10
AN11
Channel Set 1 (CH3 = 1)
Group 1
Setting prohibited
Setting prohibited
Setting prohibited
Setting prohibited
Rev. 6.00 Feb 22, 2005 page 675 of 1484
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A/D Data Register
ADDRA
ADDRB
ADDRC
ADDRD
Section 17 A/D Converter
REJ09B0103-0600

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