h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 1019
h8s-2635
Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2635.pdf
(1547 pages)
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Section 23A Power-Down Modes [HD64F2636F, HD64F2638F, HD6432636F, HD6432638F,
HD64F2630F, HD6432630F, HD64F2635F, HD6432635F, HD6432634F]
23A.2.3 Low-Power Control Register (LPWRCR)
¾
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see section 22A.2.2, Low-Power Control Register (LPWRCR).
Bits 7 to 3—Reserved: Bits DTON, LSON, NESEL, SUBSTP and RFCUT must always be
written with 0, as this version does not support subclock operation.
Bit 2—Reserved: Only write 0 to this bit.
23A.2.4 Timer Control/Status Register (TCSR)
IT
NMI
*
Note: * Only write 0 to clear the flag.
TCSR is an 8-bit read/write register that selects the clock input to WDT1 TCNT and the mode.
Here, we describe bit 4. For details of the other bits in this register, see section 12.2.2, Timer
Control/Status Register (TCSR).
The TCSR is initialized to H'00 at a reset and when in hardware standby mode. It is not initialized
in software standby mode.
Bit 4—Reserved: The PSS bit must always be written with 0 since no subclock functions are
available in versions other than the U-mask and W-mask versions.
Rev. 6.00 Feb 22, 2005 page 959 of 1484
REJ09B0103-0600
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