h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 142

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 3 MCU Operating Modes
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 3—NMI Edge Select (NMIEG): Selects the valid edge of the NMI interrupt input.
Bit 2— Reserved: Only 0 should be written to this bit.
Bit 1—Reserved: This bit is always read as 0 and cannot be modified.
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset status is released. It is not initialized in software standby mode.
Note: When the DTC is used, the RAME bit must not be cleared to 0.
Rev. 6.00 Feb 22, 2005 page 82 of 1484
REJ09B0103-0600
Bit 5
INTM1
0
1
Bit 3
NMIEG
0
1
Bit 0
RAME
0
1
Bit 4
INTM0
0
1
0
1
Description
An interrupt is requested at the falling edge of NMI input
An interrupt is requested at the rising edge of NMI input
Description
On-chip RAM is disabled
On-chip RAM is enabled
Interrupt Control
Mode
0
2
Description
Control of interrupts by I bit
Setting prohibited
Control of interrupts by I2 to I0 bits and IPR
Setting prohibited
(Initial value)
(Initial value)
(Initial value)

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