HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 123

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

3.3
3.3.1
The TLB caches address translation table information located in the external memory. The address
translation table stores the logical page number and the corresponding physical number, the
address space identifier, and the control information for the page, which is the unit of address
translation. Figure 3.6 shows the overall TLB configuration. The TLB is 4-way set associative
with 128 entries. There are 32 entries for each way. Figure 3.7 shows the configuration of virtual
addresses and TLB entries.
Entry 0
Entry 1
Entry 31
TLB Functions
Configuration of the TLB
VPN(31-17)
Figure 3.6 Overall Configuration of the TLB
Address array
VPN(11-10)
Ways 0 to 3
ASID(7-0)
V
Entry 0
Entry 1
Entry 31
PPN(28-10) PR(1-0) SZ C D SH
Rev. 2.00, 09/03, page 75 of 690
Data array
Ways 0 to 3