HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 584

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
21.5
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request is enabled when ADF in ADCSR is set to 1and the ADIE bit in ADCSR is set to 1 after
A/D conversion. The ADI interrupt can activate the direct memory access controller (DMAC) by
setting the ADIE and DMASL bits to 1. Continuous conversion without loads of software is
enabled by reading data that has been converted by the ADI interrupt with DMAC.
When activating DMAC by ADI, the ADF bit in ADCSR is automatically cleared to 0 at DMAC
data transfer.
Table 21.5 A/D Converter Interrupt Source
21.6
The following shows the definitions of A/D conversion accuracy. In the figure, the 10 bits of the
A/D converter have been simplified to 3 bits.
Rev. 2.00, 09/03, page 536 of 690
Name
ADI
Resolution
Digital output code number of the A/D converter
Quantization error
Intrinsic error of the A/D converter and is expressed as 1/2 LSB (figure 21.3)
Offset error
Deviation between analog input voltage and ideal A/D conversion characteristics when the
digital output value changes from the minimum (zero voltage) 0000000000 (H'00; 000 in
figure 21.3) to 0000000001 (H'01; 001 in figure 21.3) (figure 21.4)
Full-scale error
Deviation between analog input voltage and ideal A/D conversion characteristics when the
digital output value changes from the 1111111110 (H'3EF; 110 in figure 21.3) to the maximum
1111111111 (H'3FF; 111 in figure 21.3) (figure 21.4).
Nonlinearity error
Deviation between analog input voltage and ideal A/D conversion characteristics between zero
voltage and full-scale voltage (figure 21.4). Note that it does not include offset, full-scale, or
quantization error.
Absolute accuracy
Deviation between analog and digital input values. Note that it includes offset, full-scale,
quantization, or nonlinearity error.
Interrupts and DMAC Transfer Request
Definitions of A/D Conversion Accuracy
Interrupt source
A/D conversion end
ADF
Interrupt flag
Yes
DMAC activation

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