HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 460

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Rev. 2.00, 09/03, page 412 of 690
Read receive data in SCFRDR
Clear DR, ER, and BRK flags
Receive error handling
Break handling
Error handling
in SCSSR to 0
Figure 16.8 Sample Serial Reception Flowchart (2)
BRK = 1?
DR = 1?
ER = 1?
End
Yes
Yes
Yes
No
No
No
[1]
[2]
[1] Whether a framing error or parity error has
[2] When a break signal is received, receive data
occurred in the receive data read from
SCFRDR can be ascertained from the FER
and PER bits in SCSSR.
is not transferred to SCFRDR while the BRK
flag is set. However, note that the last data in
SCFRDR is H'00 and the break data in which
a framing error occurred is stored.

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