HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 262

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

7.8.4
A read access ends in one cycle when data exists in non-cacheable region and the data bus width is
larger than or equal to access size. As the burst length is set to 1 in synchronous DRAM burst
read/single write mode, only the required data is output. Consequently, no unnecessary bus cycles
are generated even when a cache-through area is accessed.
Figure 7.17 shows the basic timing chart for single read.
Rev. 2.00, 09/03, page 214 of 690
Single Read
Figure 7.17 Basic Timing for Single Read (Auto Precharge)
A12/A11 *
D31 to D0
A25 to A0
DACKn *
RASU/L
CASU/L
RD/WR
DQMxx *
CKIO
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
CSn
BS
1
3
2
2. xx is UU, UL, LU, or LL
3. The waveform for DACKn is when active low is specified.
Tr
Tc1
Tw
Td1
Tde
Tap