HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 375

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
13.3.2
One of four clocks (P /4, P /8, P /16, P /64) obtained by dividing the peripheral clock (P ) can
be selected by the CKS1 and CKS0 bits in CMCSR. Figure 13.3 shows the timing.
13.3.3
The CMF bit in CMCSR is set to 1 by the compare match signal generated when CMCOR and
CMCNT match. The compare match signal is generated upon the final state of the match (timing
at which the CMCNT matching count value is updated to H'0000). Consequently, after CMCOR
and CMCNT match, a compare match signal will not be generated until a CMCNT clock is input.
Figure 13.4 shows the CMF bit set timing.
CMCNT Count Timing
Compare Match Flag Set Timing
CMCNT input
Internal clock
CMCNT
clock
match signal
input clock
Compare
CMCOR
CMCNT
CMCNT
CMF
CMI
N-1
Figure 13.4 CMF Set Timing
Figure 13.3 Count Timing
N
N
N
0
Rev. 2.00, 09/03, page 327 of 690
N+1

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