HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 155

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

4.4.3
Invalidating a Specific Entry: A specific cache entry can be invalidated by accessing the
allocated memory cache and writing a 0 to the entry’s U and V bits. The A bit is cleared to 0, and
an address is specified for the entry address and the way. If the U bit of the way of the entry in
question was set to 1, the entry is written back and the V and U bits specified by the write data are
written to.
In the following example, the write data is specified in R0 and the address is specified in R1 (32-
kbyte mode).
To invalidate all entries and ways, write 0 to the following addresses.
The above operation should be performed using a non-cacheable area.
; R0 = H'0000 0000 LRU = H'000, U = 0, V = 0
; R1 = H'F000 2080; Way = 1, Entry = B'000001000, A = 0
;
MOV.L R0, @R1
32-kbyte mode (2,048 writes)
Addresses
16-kbyte mode (1,024 writes)
Addresses
F000 0000
F000 0010
F000 0020
F000 7FF0
F000 0000
F000 0010
F000 0020
F000 3FF0
:
:
Usage Examples
Rev. 2.00, 09/03, page 107 of 690