HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 386

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

14.3.3
TIOR are 16-bit registers that control the TO pin.
TIOR register settings should be made only when TCNT operation is stopped.
Care is required since TIOR is affected by the TMDR setting.
Bit
15 to 3
2
1
0
Table 14.5 IOA2 to IOA0
Channel IOA2
0 to 3
Note: * This setting is invalid in PWM mode.
Rev. 2.00, 09/03, page 338 of 690
Bit Name
IOA2
IOA1
IOA0
Timer I/O Control Registers (TIOR)
Bit 2
0
1
Bit 1
IOA1
0
1
0
1
Initial
Value
0
0
0
0
Bit 0
IOA0
0
1
0
1
0
1
0
1
R/W
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0 and cannot be modified.
I/O Control
Bits IOA2 to IOA0 specify the functions of TGRA and the TO
pin. For details, refer to table 14.5.
Description
Always 0 output
Initial output is 0
output for TO pin
Always 1 output
Initial output is 1
output for TO pin
0 output at TGRA compare match *
1 output at TGRA compare match
Toggle output at TGRA compare match *
0 output at TGRA compare match
1 output at TGRA compare match *
Toggle output at TGRA compare match *