HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 509

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

18.4.4
EP1 has two 64-byte FIFOs, but the user can receive data and read receive data without being
aware of this dual-FIFO configuration.
When one FIFO is full after reception is completed, the EP1FULL bit in IFR0 is set. After the first
receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty, and
so the next packet can be received immediately. When both FIFOs are full, NACK is returned to
the host automatically. When reading of the receive data is completed following data reception, 1
is written to the EP1RDFN bit in TRG. This operation empties the FIFO that has just been read,
and makes it ready to receive the next packet.
EP1 Bulk-Out Transfer (Dual FIFOs)
Clear EP1 FIFO full status
Data reception from host
Set EP1 FIFO full status
(IFR0.EP1 FULL = 1)
(IFR0.EP1 FULL = 0)
OUT token reception
EP1 FIFOs empty?
USB function
in EP1 FIFO?
Figure 18.10 EP1 Bulk-Out Transfer Operation
Space
Both
Yes
Yes
ACK
NACK
No
No
Interrupt request
Interrupt request
Read EP1 receive data
data register (EPDR1)
(TRG.EP1 RDFN = 1)
size register (EPSZ1)
Read data from EP1
Write 1 to EP1 read
Application
Rev. 2.00, 09/03, page 461 of 690
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